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authorEkaitz Zarraga <ekaitz@elenq.tech>2024-09-02 23:22:44 +0200
committerEkaitz Zarraga <ekaitz@elenq.tech>2024-09-02 23:22:44 +0200
commitd919eb0fdc26a6dabea9fa41d532d6d3c8e57025 (patch)
tree5ff6397fb56e70914dc8dcd83f15e86e1c60f7fd
parent4eec39aea9771fa9fede5fdc2e0a00fedce716f3 (diff)
bibliography: add FPGA reconfiguration and Continuations for concurrency
-rw-r--r--bibliography.bib70
1 files changed, 70 insertions, 0 deletions
diff --git a/bibliography.bib b/bibliography.bib
index f69a1f9..bbf6415 100644
--- a/bibliography.bib
+++ b/bibliography.bib
@@ -16,12 +16,14 @@
note = {Accessed: 2024-06-20},
howpublished = {\url{https://3lproject.org/}}
}
+
@phdthesis{ securityKernelLambda:Rees,
title={A security kernel based on the lambda-calculus},
author={Rees, Jonathan A},
year={1995},
school={Massachusetts Institute of Technology}
}
+
@inproceedings{ MIMOSA:Yvon,
author = {Samuel Yvon and Marc Feeley},
editor = {Baptiste Saleil and Michael D. Adams},
@@ -38,6 +40,42 @@
bibsource = {dblp computer science bibliography, https://dblp.org}
}
+@article{ContinuationsConcurrency:Hieb,
+ author = {Hieb, R. and Dybvig, R. Kent},
+ title = {Continuations and concurrency},
+ year = {1990},
+ issue_date = {Mar. 1990},
+ publisher = {Association for Computing Machinery},
+ address = {New York, NY, USA},
+ volume = {25},
+ number = {3},
+ issn = {0362-1340},
+ url = {https://doi.org/10.1145/99164.99178},
+ doi = {10.1145/99164.99178},
+ abstract = {Continuations have proven to be useful for implementing a
+ variety of control structures, including exception handling facilities
+ and breadth-first searching algorithms. However, traditional
+ continuations are not useful in the presence of concurrency,
+ because the notion of the rest of the computation represented by a
+ continuation does not in general make sense. This paper presents a
+ new type of continuation, called a process continuation, that may
+ be used to control tree-structured concurrency. Just as a
+ traditional continuation represents the rest of a computation from
+ a given point in the computation, a process continuation represents
+ the rest of a subcomputation, or process, from a given point in the
+ subcomputation. Process continuations allow nonlocal exits to
+ arbitrary points in the process tree and allow the capture of a
+ subtree of a computation as a composable continuation for later
+ use. Even in the absence of multiple processes, the precise control
+ achievable with process continuations makes them more useful than
+ traditional continuations.},
+ journal = {SIGPLAN Not.},
+ month = {feb},
+ pages = {128–136},
+ numpages = {9}
+}
+
+
% Oberon
@book{ Oberon:Wirth,
title={Project Oberon, The Design of an Operating System and Compiler},
@@ -325,3 +363,35 @@
url={https://arxiv.org/abs/2006.01351},
}
+
+% FPGA reconfiguration
+@article{ FPGAReconf:Vipin,
+ author = {Vipin, Kizheppatt and Fahmy, Suhaib A.},
+ title = {FPGA Dynamic and Partial Reconfiguration: A Survey of
+ Architectures, Methods, and Applications},
+ year = {2018},
+ issue_date = {July 2019},
+ publisher = {Association for Computing Machinery},
+ address = {New York, NY, USA},
+ volume = {51},
+ number = {4},
+ issn = {0360-0300},
+ url = {https://doi.org/10.1145/3193827},
+ doi = {10.1145/3193827},
+ abstract = {Dynamic and partial reconfiguration are key differentiating
+ capabilities of field programmable gate arrays (FPGAs). While they have
+ been studied extensively in academic literature, they find limited use
+ in deployed systems. We review FPGA reconfiguration, looking at
+ architectures built for the purpose, and the properties of modern
+ commercial architectures. We then investigate design flows and identify
+ the key challenges in making reconfigurable FPGA systems easier to
+ design. Finally, we look at applications where reconfiguration has
+ found use, as well as proposing new areas where this capability places
+ FPGAs in a unique position for adoption.},
+ journal = {ACM Comput. Surv.},
+ month = {jul},
+ articleno = {72},
+ numpages = {39},
+ keywords = {partial reconfiguration, dynamic reconfiguration, Field
+ programmable gate arrays}
+}