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| author | Ekaitz Zarraga <ekaitz@elenq.tech> | 2021-05-23 21:57:14 +0200 |
|---|---|---|
| committer | Ekaitz Zarraga <ekaitz@elenq.tech> | 2021-05-23 21:57:14 +0200 |
| commit | a56e3f042d034d1675c4694264654f98d2c0ca22 (patch) | |
| tree | 65648206171c3c8f6255c7c9eea4edb735951152 | |
| parent | f6886876603b709d0c899a86581e867b9e061337 (diff) | |
Fix registers and improve naming
| -rw-r--r-- | pysc-v/registers/RV32I.py | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/pysc-v/registers/RV32I.py b/pysc-v/registers/RV32I.py index 4652bca..a723064 100644 --- a/pysc-v/registers/RV32I.py +++ b/pysc-v/registers/RV32I.py @@ -27,8 +27,8 @@ class RegistersRV32I: self.addRegister(("x0","zero"), setter = zeroSetter) self.addRegister(("x1","ra")) - self.addRegister(("x2","sp")) - self.addRegister(("x3","gp")) + self.addRegister(("x2","sp", "v0")) + self.addRegister(("x3","gp", "v1")) self.addRegister(("x4","tp")) self.addRegister(("x5","t0")) self.addRegister(("x6","t1")) @@ -82,7 +82,8 @@ class RegistersRV32I: return pos def __getitem__(self, el): - return self.getter[self.getPos(el)](self, pos) + pos = self.getPos(el) + return self.getter[pos](self, pos) def __setitem__(self, el, val): pos = self.getPos(el) |